000 03006cam a22005777i 4500
999 _c817
_d817
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003 OSt
005 20200916103054.0
008 150406t20152015ne a f b 001 0 eng d
010 _a 2015937985
020 _a9780128007273
_q(pbk.)
020 _a0128007273
_q(pbk.)
020 _z9780128008157
035 _a(OCoLC)ocn920376471
040 _aCDX
_beng
_cCDX
_erda
_dOCLCO
_dYDXCP
_dBTCTA
_dJHE
_dOCLCO
_dOCLCF
_dOCLCO
_dOCLCQ
_dMEAUC
_dBDX
_dDLC
042 _alccopycat
082 0 4 _a621.3 SEL
_223
100 1 _aSeligman, Erik,
245 1 0 _aFormal verification :
_ban essential toolkit for modern VLSI design /
_cErik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar.
246 3 0 _aEssential toolkit for modern VLSI design
246 3 _aEssential toolkit for modern very large-scale integration design
260 _aAmsterdam ; Boston :
_bElsevier/MK, Morgan Kaufmann is an imprint of Elsevier, [2015] ©2015
_c ©2015
300 _axvii, 353 pages :
_billustrations ;
_c24 cm.
505 _tFormal Verification: From Dreams to Reality
_t Basic Formal Verification Algorithms
_t Introduction to SystemVerilog Assertions
_t Formal Property Verification
_t Effective FPV For Design Exercise
_tEffective FPV for Verification
_tFPV "Apps" for Specific SOC Problems
_tFormal Equivalence Verification
_tFormal Verification's Greatest Bloopers: The Danger of False Positives
_tDealing with Complexity Your New FV-Aware Lifestyle
520 _a 'Formal Verification' presents practical approaches for design and validation, with hands-on advice for working engineers integrating these techniques into their work. Building on a basic knowledge of System Verilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies.
650 0 _aElectronic circuits
650 0 _aIntegrated circuits
650 0 _aVerilog (Computer hardware description language)
650 7 _aElectronic circuits
650 7 _aIntegrated circuits
650 7 _aVerilog (Computer hardware description language)
700 1 _aSchubert, E. Thomas,
700 1 _aKumar, M. V. Achutha Kiran,
942 _2ddc
_cBK
100 1 _eauthor.
264 1 _aAmsterdam ;
_aBoston :
_bElsevier/MK, Morgan Kaufmann is an imprint of Elsevier,
_c[2015]
264 4 _c©2015
336 _atext
_btxt
_2rdacontent
337 _aunmediated
_bn
_2rdamedia
338 _avolume
_bnc
_2rdacarrier
504 _aIncludes bibliographical references and index.
650 0 _xTesting.
650 0 _xVery large scale integration
_xDesign and construction.
650 7 _xTesting.
_2fast
_0(OCoLC)fst00906898
650 7 _xVery large scale integration
_xDesign and construction.
_2fast
_0(OCoLC)fst00975610
650 7 _2fast
_0(OCoLC)fst01165388
700 1 _d1959-
_eauthor.
700 1 _eauthor.
906 _a7
_bcbc
_ccopycat
_d2
_encip
_f20
_gy-gencatlg