000 | 01019nam a22002297a 4500 | ||
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999 |
_c727 _d727 |
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005 | 20200917103117.0 | ||
008 | 190109b ||||| |||| 00| 0 eng d | ||
020 | _a9789353062019 | ||
040 | _c0 | ||
082 |
_a621.304 _bMAN |
||
100 | _aMano, M. Morris | ||
245 |
_aDigital Design: With an Introduction to the Verilog HDL, VHDL and System Verilog _cM. Norris Mano, Michael D. Ciletti. |
||
250 | _a6/e | ||
260 |
_aChennai:: _bPearson, _c2018. |
||
300 |
_a765p: _c24cm, |
||
505 |
_t1 Digital Systems and Binary Numbers _t2 Boolean Algebra and Logic Gates _t3 Gate Level Minimization _t4 Combinational Logic _t5 Synchronous Sequential Logic _t6 Registers and Counters _t7 Memory and Programmable Logic _t 8 Design at the Register Transfer Level _t 9 Asychronous Sequential logic _t10 Digital Integrated Circuits _t11 Standard Graphjic Symbols |
||
650 | _a Electronic digital computers -- Circuits. | ||
650 | _a Logic circuits. | ||
650 | _a Logic design. | ||
700 | _a Ciletti.D.Michael | ||
942 |
_2ddc _cBK |