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| 999 |
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| 005 | 20181003144540.0 | ||
| 008 | 180730b ||||| |||| 00| 0 eng d | ||
| 020 | _a9788177589184 | ||
| 040 | _c0 | ||
| 100 | _dSamir, Palnitkar | ||
| 245 | _aVerilog HDL - guide to digital design & synthesis | ||
| 250 | _a2/e | ||
| 260 |
_bPearson _c2003 |
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| 942 |
_2ddc _cNBM |
||