000 02152nam a22001697a 4500
999 _c1141
_d1141
005 20210405105626.0
008 210405b ||||| |||| 00| 0 eng d
020 _a9781108494540
082 _a621.381
_bRAZ
100 _a Razavi,Behzad
245 _aDesign of CMOS phase-locked loops :
_bfrom circuit level to architecture level
_cBehzad Razavi
260 _aCambridge :
_bCambridge University Press,
_c2020.
300 _axvi, 492 pages
_c24CM:
505 _t1. Oscillator fundamentals;
_t 2. Introduction to jitter and phase noise;
_t 3. Design of inverter-based ring oscillators;
_t 4. Design of differential and multiphase ring oscillators;
_t 5. LC oscillator design;
_t6. Advanced oscillator concepts;
_t7. Basic PLL architectures;rs
_t 8. PLL design considerations;
_t9. PLL design study;
_t10. Digital phase-locked loops;
_t11. Delay-locked loops;
_t 12. RF synthesis;
_t13. Clock and data recovery fundamentals;
_t14. Advanced clock and data recovery principles;
_t15. Frequency divide
520 _a Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) design for a wide range of applications. It features intuitive presentation of theoretical concepts, built up gradually from their simplest form to more practical systems; broad coverage of key topics, including oscillators, phase noise, analog PLLs, digital PLLs, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers; tutorial chapters on high-performance oscillator design, covering fundamentals to advanced topologies; and extensive use of circuit simulations to teach design mentality, highlight design flaws, and connect theory with practice. Including over 200 thought-provoking examples highlighting best practices and common pitfalls, 250 end-of-chapter homework problems to test and enhance the readers' understanding, and solutions and lecture slides for instructors, this is the perfect text for senior undergraduate and graduate-level students and professional engineers who want an in-depth understanding of PLL design
942 _2ddc
_cBK