Stallings, William  <br/><br/>
Computer Organization  and Architecture :   Designing for Performance 

 - 10th Edition 
 - Noida :  Pearson,  2009. 
 - 792p.  ill.;  25 cm. 
<br/><br/> Chapter 1: Basic Concepts and Computer Evolution<br/>  Chapter 2: Performance Issues  Chapter 3: A Top-Level View of Computer Function and Interconnection<br/>  Chapter 4: Cache Memory<br/>  Chapter 5: Internal Memory Technology<br/>  Chapter 6: External Memory<br/>  Chapter 7: Input/Output<br/>  Chapter 8: Operating System Support  Chapter 9: Number Systems<br/>  Chapter 10: Computer Arithmetic<br/>  Chapter 11: Digital Logic  Chapter 12: Instruction Sets: Characteristics and Functions<br/><br/>   Chapter 13: Instruction Sets: Addressing Modes and Formats<br/>  Chapter 14: Processor Structure and Function<br/>  Chapter 15: Reduced Instruction Set Computers (RISCs)<br/>  Chapter 16: Instruction-Level Parallelism and Superscalar Processors  Chapter 17: Parallel Processing<br/><br/>   Chapter 18: Multicore Computers<br/>  Chapter 19: General-Purpose Graphic Processing Units  Chapter 20: Control Unit Operation<br/>  Chapter 21: Microprogrammed Control 
<br/><br/> <br/>With clear, concise, and easy-to-read material, the tenth edition of Computer Organization and Architecture is a user-friendly source for students studying computers. Subjects such as I/O functions and structures, RISC, and parallel processors have been integrated with real-world examples throughout. Using brand new material and strengthened pedagogy, this text ensures that students are effectively engaged in the world of computer organization and architecture. 
<br/><br/><label>ISBN: </label>9789332570405 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Computer organization<br/>Computer architecture
<br/><br/><label>Dewey Class. No.: </label>005.32   / STA