Digital Design: (Record no. 745)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01437nam a22002177a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200923153919.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 190121b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9788190935630 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | 0 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.304 |
| Item number | ASH |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Ashenden, Peter J. |
| 245 ## - TITLE STATEMENT | |
| Title | Digital Design: |
| Remainder of title | an embedded systems approach using VERILOG |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Amsterdam : |
| Name of publisher, distributor, etc. | Morgan Kaufmann Publishers, |
| Date of publication, distribution, etc. | ©2008. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Page number | 557 pages : |
| Other physical details | ill.; |
| Dimensions | 25 cm. |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 1. Introduction and Methodology |
| -- | 2. Combinational Basics |
| -- | 3. Numeric Basics |
| -- | 4. Sequential Basics |
| -- | 5. Memories |
| -- | 6. Implementation Fabrics |
| -- | 7. Processor Basics |
| -- | 8. I/O Interfacing |
| -- | 9. Accelerators |
| -- | 10. Design Methodology App |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | Digital Design: An Embedded Systems Approach Using Verilog provides a foundation in digital design for students in computer engineering, electrical engineering and computer science courses. It takes an up-to-date and modern approach of presenting digital logic design as an activity in a larger systems design context. Rather than focus on aspects of digital design that have little relevance in a realistic design context, this book concentrates on modern and evolving knowledge and design skills. Hardware description language (HDL)-based design and verification is emphasized |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Embedded computer systems |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Verilog (Computer hardware description language) |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | System design |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Gratis, Gifts |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
| -- | 1617 |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Date acquired | Total Checkouts | Total Renewals | Full call number | Barcode | Date last seen | Date last checked out | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | Non-fiction | IIITDM Kurnool | IIITDM Kurnool | General Stacks | 21.01.2019 | 2 | 1 | 621.304 ASH | G000039 | 20.09.2022 | 03.08.2022 | 21.01.2019 | Gratis, Gifts |