MARC details
| 000 -LEADER |
|---|
| fixed length control field |
01951 a2200217 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20200901161417.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
180727b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9789332570405 |
| 040 ## - CATALOGING SOURCE |
|---|
| Transcribing agency |
0 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
005.32 |
| Item number |
STA |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Stallings, William |
| 245 ## - TITLE STATEMENT |
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| Title |
Computer Organization and Architecture : |
| Remainder of title |
Designing for Performance |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
10th Edition |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Name of publisher, distributor, etc. |
Pearson, |
| Date of publication, distribution, etc. |
2009. |
| Place of publication, distribution, etc. |
Noida : |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Page number |
792p. |
| Other physical details |
ill.; |
| Dimensions |
25 cm. |
| 505 ## - FORMATTED CONTENTS NOTE |
|---|
| Title |
Chapter 1: Basic Concepts and Computer Evolution<br/> |
| -- |
Chapter 2: Performance Issues |
| -- |
Chapter 3: A Top-Level View of Computer Function and Interconnection<br/> |
| -- |
Chapter 4: Cache Memory<br/> |
| -- |
Chapter 5: Internal Memory Technology<br/> |
| -- |
Chapter 6: External Memory<br/> |
| -- |
Chapter 7: Input/Output<br/> |
| -- |
Chapter 8: Operating System Support |
| -- |
Chapter 9: Number Systems<br/> |
| -- |
Chapter 10: Computer Arithmetic<br/> |
| -- |
Chapter 11: Digital Logic |
| -- |
Chapter 12: Instruction Sets: Characteristics and Functions<br/><br/> |
| -- |
Chapter 13: Instruction Sets: Addressing Modes and Formats<br/> |
| -- |
Chapter 14: Processor Structure and Function<br/> |
| -- |
Chapter 15: Reduced Instruction Set Computers (RISCs)<br/> |
| -- |
Chapter 16: Instruction-Level Parallelism and Superscalar Processors |
| -- |
Chapter 17: Parallel Processing<br/><br/> |
| -- |
Chapter 18: Multicore Computers<br/> |
| -- |
Chapter 19: General-Purpose Graphic Processing Units |
| -- |
Chapter 20: Control Unit Operation<br/> |
| -- |
Chapter 21: Microprogrammed Control |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
<br/>With clear, concise, and easy-to-read material, the tenth edition of Computer Organization and Architecture is a user-friendly source for students studying computers. Subjects such as I/O functions and structures, RISC, and parallel processors have been integrated with real-world examples throughout. Using brand new material and strengthened pedagogy, this text ensures that students are effectively engaged in the world of computer organization and architecture. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Computer organization |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Computer architecture |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
Books |
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
872 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
873 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
874 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
875 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
876 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
2659 |
