MARC details
| 000 -LEADER |
|---|
| fixed length control field |
02152nam a22001697a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20210405105626.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
210405b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9781108494540 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.381 |
| Item number |
RAZ |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Razavi,Behzad |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
Design of CMOS phase-locked loops : |
| Remainder of title |
from circuit level to architecture level |
| Statement of responsibility, etc. |
Behzad Razavi |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Cambridge : |
| Name of publisher, distributor, etc. |
Cambridge University Press, |
| Date of publication, distribution, etc. |
2020. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Page number |
xvi, 492 pages |
| Dimensions |
24CM: |
| 505 ## - FORMATTED CONTENTS NOTE |
|---|
| Title |
1. Oscillator fundamentals; |
| -- |
2. Introduction to jitter and phase noise; |
| -- |
3. Design of inverter-based ring oscillators; |
| -- |
4. Design of differential and multiphase ring oscillators; |
| -- |
5. LC oscillator design; |
| -- |
6. Advanced oscillator concepts; |
| -- |
7. Basic PLL architectures;rs |
| -- |
8. PLL design considerations; |
| -- |
9. PLL design study; |
| -- |
10. Digital phase-locked loops; |
| -- |
11. Delay-locked loops; |
| -- |
12. RF synthesis; |
| -- |
13. Clock and data recovery fundamentals; |
| -- |
14. Advanced clock and data recovery principles; |
| -- |
15. Frequency divide |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
<br/>Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) design for a wide range of applications. It features intuitive presentation of theoretical concepts, built up gradually from their simplest form to more practical systems; broad coverage of key topics, including oscillators, phase noise, analog PLLs, digital PLLs, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers; tutorial chapters on high-performance oscillator design, covering fundamentals to advanced topologies; and extensive use of circuit simulations to teach design mentality, highlight design flaws, and connect theory with practice. Including over 200 thought-provoking examples highlighting best practices and common pitfalls, 250 end-of-chapter homework problems to test and enhance the readers' understanding, and solutions and lecture slides for instructors, this is the perfect text for senior undergraduate and graduate-level students and professional engineers who want an in-depth understanding of PLL design |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| Koha item type |
Books |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
3765 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
3766 |
