Fundamentals Of Device & Systems Packaging

Tummala, Rao R.

Fundamentals Of Device & Systems Packaging Rao Tummala - 2 - Chennai: McGraw Hill Education India, 2020. - xx, 828p

1 Introduction to Device and Systems Packaging Technologies
1.2 Anatomy of an Electronic Packaged System from a Packaging Point of View
1.3 Devices and Moore’s Law
1.4 Electronic Technology Waves: Microelectronics, RF/Wireless, Photonics, MEMS, and
Quantum Devices
1.5 Packaging and Moore’s Law for Packaging
1.6 Electronic Systems Technologies Trends
1.7 Future Outlook
1.8 How the Book Is Organized
1.9 Homework Problems
1.10 Suggested Reading
Part 1 Fundamentals of Packaging


2 Fundamentals of Electrical Design for Signals, Power, and Electromagnetic
Interference
2.1 What Is Electrical Package Design and Why?
2.2 Electrical Anatomy of a Package
2.3 Signal Distribution
2.4 Power Distribution
2.5 Electromagnetic Interference
2.6 Summary and Future Trends
2.7 Homework Problems
2.8 Suggested Reading


3 Fundamentals of Thermal Technologies
3.1 What Is Thermal Management and Why?
3.2 Anatomy of a Thermal Package System
3.3 Chip Level Thermal Technologies
3.4 Module Level Thermal Technologies
3.5 System Level Thermal Technologies
3.6 Power and Cooling Technologies for Electric Vehicles
3.7 Summary and Future Trends
3.8 Homework Problems
3.9 Suggested Reading


4 Fundamentals of Thermo-Mechanical Reliability
4.1 What Is Thermo-Mechanical Reliability?
4.2 Anatomy of a Package with Failures and Failure Mechanisms
4.3 Types of Thermo-Mechanical-Induced Failures and Design Guidelines for Reliability
4.4 Summary and Future Trends
4.5 Homework Problems
4.6 Suggested Reading


5 Fundamentals of Package Materials at Microscale and Nanoscale
5.1 What Is the Role of Materials in Packaging?
5.2 Anatomy of a Package with a Variety of Materials
5.3 Package Materials, Processes, and Properties
5.4 Summary and Future Trends
5.5 Homework Problems
5.6 Suggested Reading


6 Fundamentals of Ceramic, Organic, Glass, and Silicon Package Substrates
6.1 What Is a Package Substrate and Why?
6.2 Anatomy of Three Package Substrates: Ceramics, Organic Laminates, and Silicon
6.3 Package Substrate Technologies
6.3.1 Historical Trends
6.4 Thick-Film Substrates
6.5 Thin-Film Substrates
6.6 Ultra-Thin-Film Substrates with Semiconductor Packaging Processes
6.7 Summary and Future Trends
6.8 Homework Problems
6.9 Suggested Reading


7 Fundamentals of Passive Components and Integration with Active Devices
7.1 What Are Passive Components and Why?
7.2 Anatomy of Passive Components
7.3 Passive Component Technologies
7.4 Functional Modules with Passives and Actives
7.5 Summary and Future Trends
7.6 Homework Problems
7.7 Suggested Reading


8 Fundamentals of Chip-to-Package Interconnections and Assembly
8.1 What Are Chip-to-Package Interconnections and Assembly and Why?
8.2 Anatomy of an Interconnection and Assembly
8.4 Interconnections and Assembly Technologies
8.5 Future Trends in Interconnection and Assembly Technologies
8.5.1 Extension of SLID
8.6 Homework Problems
8.7 Suggested Reading
9 Fundamentals of Embedded and Fan-Out Packaging
9.2 Anatomy of a Fan-Out Wafer-Level Package (FO-WLP)
9.3 Fan-Out Wafer-Level Package Technologies
9.4 Panel-Level Package (PLP)
9.5 Summary and Future Trends
9.6 Homework Problems
9.7 Suggested Reading


10 Fundamentals of 3D Packaging with and without TSV
10.2 Anatomy of a 3D Package with TSV
10.3 3D ICs with TSV Technologies
10.4 Summary and Future Trends
10.5 Homework Problems
10.6 Suggested Reading
10.7 Acknowledgment


11 Fundamentals of RF and Millimeter-Wave Packaging
11.2 Anatomy of an RF System
11.3 RF Technologies and Applications
11.4 What Is a Millimeter-Wave System?
11.5 Anatomy of a Millimeter-Wave Package
11.6 Millimeter-Wave Technologies and Applications
11.7 Summary and Future Trends
11.8 Homework Problems
11.9 Suggested Reading


12 Fundamentals of Optoelectronics Packaging
12.1 What Is Optoelectronics?
12.2 Anatomy of an Optoelectronics System
12.3 Optoelectronic Technologies
12.4 Optoelectronic Systems, Applications, and Markets
12.5 Summary and Future Trends
12.6 Homework Problems
12.7 Suggested Reading


13 Fundamentals of MEMS and Sensor Packaging
13.1 What Are MEMS?13.1.1 Historical Evolution
13.2 Anatomy of a MEMS Package
13.3 MEMS and Sensor Device Fabrication Technologies
13.4 MEMS Packaging Technologies
13.5 Application of MEMS and Sensors
13.6 Summary and Future Trends
13.7 Homework Problems
13.8 Suggested Reading


14 Fundamentals of Package Encapsulation, Molding, and Sealing
14.1 What Is Sealing and Encapsulation and Why?
14.2 Anatomy of an Encapsulated and a Sealed Package
14.3 Properties of Encapsulants
14.4 Encapsulation Materials
14.5 Encapsulation Processes
14.6 Hermetic Sealing
14.7 Summary and Future Trends
14.8 Homework Problems
14.9 Suggested Reading


15 Fundamentals of Printed Wiring Boards
15.1 What Is a Printed Wiring Board?
15.2 Anatomy of a Printed Wiring Board
15.3 Printed Wiring Board Technologies
15.4 Summary and Future Trends
15.5 Homework Problems
15.6 Suggested Reading


16 Fundamentals of Board Assembly
16.1 What Is a Printed Circuit Board Assembly (PCBA) and Why?
16.2 Anatomy of Printed Circuit Board Assembly
16.3 PCBA Technologies
16.4 Types of Printed CircuitBoard Assembly
16.5 Types of Assembly Soldering Processes
16.6 Summary and Future Trends
16.7 Homework Problems
16.8 Suggested Reading
16.9 Acknowledgment


Part 2 Applications of Packaging Technologies
17 Applications of Packaging Technologies in Future Car Electronics
17.1 What Are Future Car Electronics and Why?
17.2 Anatomy of a Future Car
17.3 Future Car Electronic Technologies
17.4 Summary and Future Trends
17.5 Homework Problems
17.6 Suggested Reading


18 Applications of Packaging Technologies in Bioelectronics
18.1 What Are Bioelectronics?
18.2 Packaging Technologies for Bioelectronic Systems
18.3 Examples of Bioelectronic Implants
18.4 Summary and Future Trends
18.5 Homework Problems
18.6 Suggested Reading


19 Applications of Packaging Technologies in Communication Systems
19.1 What Are Communication Systems and Why?
19.2 Anatomy of Two Communication Systems: Wired and Wireless
19.3 Communication System Technologies
19.4 Summary and Future Trends
19.5 Homework Problems
19.6 Suggested Reading


20 Applications of Packaging Technologies in Computing Systems
20.1 What Is Computer Packaging?
20.2 The Anatomy of a Computer Package
20.3 Computer Packaging Technologies
20.4 Thermal Technologies
20.5 Summary and Future Trends
20.6 Homework Problems
20.7 Suggested Reading
20.8 Acknowledgments


21 Applications of Packaging Technologies in Flexible Electronics
21.1 What Are Flexible Electronics and Why?
21.2 Anatomy of a Flexible Electronic System
21.4 Summary and Future Trends
21.5 Homework Problems
21.6 Suggested Reading


22 Applications of Packaging Technologies in Smartphones
22.1 What Are Smartphones?
22.2 Anatomy of a Smartphone
22.3 Smartphone Packaging Technologies
22.4 Systems Packaging in Smartphones
22.5 Summary and Future Trends
22.6 Homework Problems
22.7 Suggested Reading

This thoroughly revised book offers the latest, comprehensive fundamentals in device
and systems packaging technologies and applications. Readers will get in-depth
explanations of the 15 core packaging technologies that make up any electronic
system, including electrical design for power, signal, and EMI; thermal design by
conduction, convection, and radiation heat transfer; thermo-mechanical failures and
reliability; advanced packaging materials at micro and nanoscales; ceramic, organic,
glass, and silicon substrates. This resource also discusses passive components such as
capacitors, inductors, and resistors and their proximity integration with actives;
chip-to-package interconnections and assembly; wafer and panel embedding
technologies; 3D packaging with and without TS; RF and millimeter-wave packaging;
role of optoelectronics; mems and sensor packaging ;encapsulation, molding and
sealing; and printed wiring board and its assembly to form end-product systems.
Fundamentals of Device and Systems Packaging: Technologies and Applications,
Second Edition introduces the concept of Moore’s Law for packaging, as Moore’s Law
for ICs is coming to an end due to physical, material, electrical, and financial
limitations. Moore’s Law for Packaging (MLP) can be viewed as interconnecting and
integrating many smaller chips with high aggregate transistor density, at higher
performance and lower cost than Moore’s Law for ICs. This book lays the groundwork
for Moore’s Law for Packaging by showing how I/Os have evolved from one package
family node to the next, starting with <16 I/Os in the 1960s with leadframe-plastic
packages to the current silicon interposers with about 200,000 I/Os. It proposes a
variety of ways to extend Moore’s Law, such as extending Si interposers and beyond
using glass panel embedding.

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